What if the most expensive and energy-hungry part of AI processing isn't the compute itself — but the memory?
This is the bet that XCENA, a South Korean chip startup, is placing with its recent $135 million Series B funding round. The company is challenging the status quo by arguing that the real bottleneck in AI performance isn't the processing power of GPUs or TPUs, but the inefficiencies in data movement — specifically, the way data is fetched and sent across systems. By placing compute closer to DRAM memory, XCENA aims to reduce the energy costs and infrastructure demands of AI workloads.

A New Architecture for AI Infrastructure

XCENA’s MX1 chip is designed to handle data-intensive tasks directly within the memory module, reducing the need for constant data transfers between the CPU and DRAM. This approach is made possible through CXL, a high-speed interconnect that allows the chip to communicate directly with the CPU, minimizing latency. The MX1 is targeted at hyperscalers and cloud providers looking to cut costs associated with AI inference, which often requires massive server farms to handle real-time queries.

Key features of the MX1 include:

  • Preprocessing within memory to reduce data movement
  • CXL-based communication with the CPU
  • Optimized for memory-bound tasks such as KV cache management
  • Designed for large-scale AI workloads requiring efficient infrastructure

Rivals and Roadmaps

XCENA isn't the only player vying for dominance in memory-centric AI chips. Competitors like Marvell and Astera Labs are also developing next-generation memory connectivity solutions. However, XCENA differentiates itself through vertical integration — the company builds its own memory hierarchy, interconnect bus, and DRAM controller, rather than outsourcing these components. This control allows for more precise optimization of performance and efficiency.

The MX1 is still in the prototype stage, with mass production expected to begin in the second half of 2026. Revenue from the chip is anticipated to start in 2027, with Samsung and SK Hynix — two of the world's largest memory suppliers — already engaging in early discussions with the startup. These partnerships could be critical for scaling XCENA’s vision and bringing its memory-centric architecture to market.

The Memory Shift in AI

The demand for advanced memory solutions has been fueled by the rapid growth of AI workloads, particularly in inference. As AI models grow more complex and data volumes expand, traditional architectures are being pushed to their limits. This has led to a broader industry recognition that memory is just as crucial as compute for the future of AI.

With the global memory market — dominated by Samsung, SK Hynix, and Micron — reaching new valuation highs, the shift toward memory-centric architectures is no longer a theoretical concept. It’s becoming a strategic necessity for companies aiming to future-proof their AI infrastructure. XCENA’s approach aligns with this trend, positioning memory as the key to sustainable AI growth.

XCENA’s bet is not just on a new chip — it’s on a fundamental rethinking of how data flows through computing systems. If successful, the startup could redefine the economics of AI, proving that the future of processing might lie not in more powerful chips, but in smarter data movement.